LC7958NC 查看數據表（PDF） - SANYO -> Panasonic
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LC7958NC Datasheet PDF : 11 Pages
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LC7958NC
Function Table
1. Shift Register and Latch Blocks
SEL
CLOCK1
Falling
edge
High
Rising edge
-
LOAD1
-
-
High
Shift register
DATA load and DATA
shift
DATA keep
-
-
Low
-
Falling
edge
DATA load and DATA
-
shift
Rising edge
-
Low
DATA keep
-
Low
-
-
High
-
Latch
-
-
DATA load
DATA keep
-
-
DATA load
DATA keep
2. Output Block
STROBE
High
Low
Low
Note 1: "×": don’t care
SI
“×”
Low
High
DO output
OFF
OFF
ON
Establishment of Output Current
MODE
ADJ(+)
ADJ(-)
Current control
IOH(typ)
resistance
1
Low
Low
Built in (RINT)
VREF/RINT × 10
2
Low
High
Built in (RINT)
VREF/RINT × 10 × 0.94
3
High
Low
Built in (RINT)
VREF/RINT× 10 × 1.06
Note 2: RINT(TYP) = 3.61 kΩ
*Complement explanation
Here shows the general usage of the modes 1 to 3 as follows.
MODE 1 is set by connecting the ADJ(+) and ADJ(-) terminals with VSS. In the MODE1 state, by cutting the
bonding wire connected with ADJ(+) or ADJ(-), the IC enters the MODE2 or MODE3, respectively. The current in
MODE1 can be corrected by about –6 % or +6 % in MODE2 or MODE3, respectively.
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