datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF

NJU3504FA1 查看數據表(PDF) - Japan Radio Corporation

零件编号
产品描述 (功能)
比赛名单
NJU3504FA1
JRC
Japan Radio Corporation  JRC
NJU3504FA1 Datasheet PDF : 60 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
NJU3504
Though the data of the Timer and Counter can be read in the count operation, the read data is
sometimes incorrect when the clock inputs to the counter during the reading operation.
When the 8-bit counter data is read in count operation as shown in the following timing chart(An
example of data reading from the counter to RAM), Timer often counts up between the first 4-bit data
reading and the second. In case of the following chart, though the timer data is "0Fh" when the
lower 4-bit data is gotten, it is "10h" when the higher 4-bit data is gotten. Therefore the final data
becomes to be "1Fh".
[An example of data reading from the counter to RAM]
Counter clock
(prescaler
8 divide)
Timer Data
(8bit)
0D
0E
0F
10
11
12
Reading
Y-register
LSB
RAM
(4bit Y-address=0)
RAM
(4bit Y-address=1)
E
0
F
1
1
1
0Eh
1Fh:Incorrect data
11h
There are some other cases to read the incorrect data from the 8-bit counter during the count
operation depending on the relation with the external clock speed and the system execution speed.
- 29 -

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]