PDI1394L40 查看數據表（PDF） - Philips Electronics
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PDI1394L40 Datasheet PDF : 80 Pages
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Philips Semiconductors
1394 enhanced AV link layer controller
Preliminary specification
PDI1394L40
16.3 PHY-Link Interface Critical Timings
SCLK
PHY D[0:7], PHY CTL[0:1]
50%
tSUP
tHP
50%
tSCLKPER
50%
Figure 38. PHY D[0:7], PHY CTL[0:1] Input Setup and Hold Timing Waveforms
50%
SV00919
SCLK
PHY D[0:7], PHY CTL[0:1], LREQ
50%
tDP
50%
SV00694
Figure 39. PHY D[0:7], PHY CTL[0:1], and LREQ Output-Delay Timing Waveforms
2000 Dec 15
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