FBL2031BB 查看數據表（PDF） - Philips Electronics
零件编号
产品描述 (功能)
比赛名单
FBL2031BB Datasheet PDF : 16 Pages
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Philips Semiconductors
9-bit BTL 3.3V latched/registered/pass-thru
Futurebus+ transceiver
PIN CONFIGURATION
Product specification
FBL2031
52 51 50 49 48 47 46 45 44 43 42 41 40
LOGIC GND 1
A2 2
LOGIC GND 3
A3 4
LOGIC GND 5
A4 6
LOGIC GND 7
A5 8
LOGIC GND 9
A6 10
LOGIC GND 11
A7 12
LOGIC GND 13
9-Bit latched/registered transceiver
FBL2031
52-lead PQFP
39 BUS GND
38 B1
37 BUS GND
36 B2
35 BUS GND
34 B3
33 BUS GND
32 B4
31 BUS GND
30 B5
29 BUS GND
28 B6
27 BUS GND
14 15 16 17 18 19 20 21 22 23 24 25 26
PIN DESCRIPTION
SYMBOL
PIN NUMBER
A0 – A8
50, 52, 2, 4, 6, 8, 10, 12, 14
B0 – B8
40, 38, 36, 34, 32,
30, 28, 26, 24
OEB0
46
OEB1
45
OEA
47
BUS GND
25, 27, 29, 31, 33,
35, 37, 39, 41
LOGIC GND
51, 1, 3, 5, 7, 9, 11, 13
VCC
BIAS V
23, 43, 49
48
BG VCC
17
BG GND
19
SEL0
20
SEL1
15
LCAB
18
LCBA
16
TMS
42
TCK
44
TDI
22
TDO
21
TYPE
I/O
I/O
Input
Input
Input
GND
GND
Power
Power
Power
GND
Input
Input
Input
Input
Input
Input
Input
Output
SG00087
NAME AND FUNCTION
BiCMOS data inputs/3-State outputs (TTL)
Data inputs/Open Collector outputs, High current drive (BTL)
Enables the B outputs when High
Enables the B outputs when Low
Enables the A outputs when High
Bus ground (0V)
Logic ground (0V)
Positive supply voltage
Live insertion pre-bias pin
Band Gap threshold voltage reference
Band Gap threshold voltage reference ground
Mode select
Mode select
A to B clock/latch enable (transparent latch when Low)
B to A clock/latch enable (transparent latch when Low)
Test Mode Select (optional, if not implemented then no connect)
Test Clock (optional, if not implemented then no connect)
Test Data In (optional, if not implemented then no connect)
Test Data Out (optional, if not implemented then shorted to TDI)
2000 Apr 18
3
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