ST70136G 查看數據表（PDF） - STMicroelectronics

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ST70136G

CPE ADSL ANALOG FRONT END

STMicroelectronics 

ST70136

2 - PIN DESCRIPTION

2.1 - Analog Power Supplies

These pins are the positive analog power supply

voltage for the DAC and the ADC section. It is not

internally connected to digital supply. In any case

the voltage on these pins must be higher or equal

to the voltage of the Digital power supply.

2.2 - Digital Power Supplies

These pins are the power supply pins that are

used by the internal digital circuitry. All DVDD pins

must be connected together to a +3.3 V supply.

2.3 - Analog Ground and Substrate

These pins are the ground return of the analog

DAC and ADC blocks. The analog VDDA should

be decoupled with respect to the analog ground.

Decoupling capacitors should be as close as pos-

sible to the supplies pins. All grounds must be tied

together.

2.4 - Digital Ground

These pins are the ground return of the digital cir-

cuitry. The digital power supplies must should be

decoupled with respect to the digital ground.

Decoupling capacitors should be as close as pos-

sible to the supplies pins. All grounds must be tied

together.

2.5 - Powerdown - PWD

When pin PWD =”1”, the chip is set in low power

mode.

2.6 - Suspend

The SUSPEND pin is used to control the output of

CLKM. When SUSPEND is low CLKM output is

enabled otherwise CLKM is disabled.

2.7 - Reset

The reset function is implied when the NRESET

pin is at a low voltage input level. In this condition,

the reset function can be easily used for power up

reset conditions. Reset is asynchronous, tenths of

ns are enough to put the IC in reset. After reset, all

registers are set to their default value.

2.8 - Reference Voltages

2.8.1 - V125AD, V250AD, V375AD

These pins are used to externally decouple the

internal reference voltages used for the ADC

(1.25V, 2.5V, 3.75V).

2.8.2 - V3P75V

This pin is the 3.75V Bandgap output and should

be externally decoupled with an external capacitor

of 0.22uF.

2.8.3 - IREF50U

This pin is used for setting the bias current and

must be externally connected to a resistor of

2.5V / 50µA equals 50kΩ.

2.8.4 - V290DA

This pin is the 2.9V transmit DAC output reference

voltage and must be decoupled externally.

2.9 - Analog Transmit Output

2.9.1 - TXP

This pin is the non-inverting output of the fully dif-

ferential analog amplifier.

2.9.2 - TXN

This pin is the inverting output of the fully differen-

tial analog amplifier.

2.9.3 - TXIP

This pin is the differential non-inverting input for

external filtering.

2.9.4 - TXIN

This pin is the differential inverting input for exter-

nal filtering.

2.9.5 - PGAP

This pin is the differential non-inverting PGA out-

put.

2.9.6 - PGAN

This pin is the differential inverting PGA output.

2.10 - Analog Receive Input

2.10.1 - RXN

This pin is the differential inverting receive input.

2.10.2 - RXP

This pin is the differential non-inverting receive

input.

2.11 - Tone Detector

The analog input differential signal must be less

than 8V peak to peak. These pins are used for

activity detection when in sleeping mode.

2.11.1 - TON

This pin is the differential inverting tone detector

input.

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