W742C814 查看數據表（PDF） - Winbond

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W742C814

4-BIT MICROCONTROLLER

Winbond 

W742C814

Fosc

Divider0

... Q1 Q2

Q9 Q10 Q11 Q12 Q13 Q14

S

EVF.0

Q

R

HEF.0

IEF.0

Hold mode release

(HCF.0)

Divider interrupt (INT0)

WDTR.3

Fosc/16384

Fosc/2048

Fslow/16384

Fslow/2048

Option code is "0"

1. Reset

2. CLR EVF,#01H

3. CLR DIVR0

WDTR.2 Disable WDT

Qw1 Qw2 Qw3 Qw4

R

R

R

R

Enable

Option code is "1"

Overflow signal

1. Reset

2. CLR WDT

System Reset

Fslow

Divider1

... Q1 Q2

Q9 Q10 Q11 Q12 Q13 Q14

SCR.3

S

EVF.4

Q

R

HEF.4

IEF.4

Hold mode release

(HCF.4)

Divider interrupt

(INT1)

1. Reset

2. CLR EVF,#10H

3. CLR DIVR1

Figure 6-5 Organization of Divider0, Divider1 and WatchDog Timer

3

2

1

0

WDTR R/W R/W R/W R

Note: R/W means read/write available, R means read only. Power On reset default is: 0000

Bit 3 = 0 FOSC/2048(Select Divider0) or Fslow/2048(Select Divider1) as the WDT source.

= 1 FOSC/16384(Select Divider0) or Fslow/16384(Select Divider1) as the WDT source.

Bit 2 = 0 Select Divider0.

= 1 Select Divider1.

Bit 1 = 0 Refer to Table 2.

= 1 Refer to Table 2.

Bit 0 = 0 No time out.

= 1 Time out.

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