T35L6464A 查看數據表（PDF） - Taiwan Memory Technology
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T35L6464A Datasheet PDF : 16 Pages
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T35L6464A
AC ELECTRICAL CHARACTERISTICS
(Note 5) (0°C ≤ TA ≤ 70°C; Vcc = + 3.3V +10%/-5%)
DESCRIPTION
-5
-6
-7
-8
SYM. MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
Clock
Clock cycle time
tKC
10
12
15
20
ns
Clock HIGH time
tKH
4
4.5
5
6
ns
Clock LOW time
tKL
4
4.5
5
6
ns
Output Times
Clock to output valid
tKQ
5
6
7
8 ns
Clock to output invalid tKQX 2
2
2
2
ns
Clock to output in Low-Z tKQLZ 4
5
5
5
ns
6,7
Clock to output in High-Z tKQHZ
5
5
6
6 ns
6,7
OE to output valid
tOEQ
5
5
5
6 ns
9
OE to output in Low-Z tOELZ 0
0
0
0
ns
6,7
OE to output in High-Z tOEHZ
4
5
6
6 ns
6,7
Setup Times
Address
Address Status
tAS
3
3
3
3
tADSS 3
3
3
3
ns
8,10
ns
8,10
( ADSC , ADSP )
Address Advance (ADV ) tAAS
3
3
3
3
ns
8,10
Byte Write Enables
tWS
3
3
3
3
ns
8,10
( BW1~ BW8 , BWE , GW )
Data-in
tDS
3
3
3
3
ns
8,10
Chip Enables ( CE ,
tCES
3
3
3
3
ns
8,10
CE2 ,CE2,CE3,CE3)
Hold Times
Address
tAH
0.5
0.5
0.5
0.5
Address Status
tADSH 0.5
0.5
0.5
0.5
( ADSC , ADSP )
Address Advance (ADV ) tAAH 0.5
0.5
0.5
0.5
Byte Write Enables
tWH 0.5
0.5
0.5
0.5
ns
8,10
ns
8,10
ns
8,10
ns
8,10
( BW1~ BW8 , BWE , GW )
Data-in
tDH
0.5
0.5
0.5
0.5
Chip Enables ( CE ,
tCEH 0.5
0.5
0.5
0.5
CE2 ,CE2, CE3,CE3)
ns
8,10
ns
8,10
Taiwan Memory Technology, Inc. reserves the right P. 9
to change products or specifications without notice.
Publication Date: AUG. 1998
Revision: E
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