M6MF16S2AVP 查看數據表（PDF） - MITSUBISHI ELECTRIC
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M6MF16S2AVP
MITSUBISHI ELECTRIC
M6MF16S2AVP Datasheet PDF : 20 Pages
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PRELIMINARY Notice
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MITSUBISHI LSIs
M6MF16S2AVP
16777216-BIT (2097152-WORD BY 8-BIT) CMOS 3.3V-ONLY
FLASH MEMORY &
2097152-BIT (262144-WORD BY 8-BIT) CMOS STATIC RAM
Stacked-MCP (Multi Chip Package)
DESCRIPTION
The MITSUBISHI M6MF16S2AVP is a Stacked Muti Chip
Package (S-MCP) that contents 16M-bit flash memory and
2M-bit Static RAM in a 48-pin TSOP (TYPE-I).
16M-bit Flash memory is a 2097152 bytes, 3.3V-only, and
high performance non-volatile memory fabricated by
CMOS technology for the peripheral circuit and
DINOR(DIvided bit-line NOR) architecture for the memory
cell.
2M-bit SRAM is a 262144 bytes unsynchronous SRAM
fabricated by silicon-gate CMOS technology.
FEATURES
• Access time (Flash Memory, SRAM)
110ns (Max.)
• Supply voltage
Vcc=2.7 ~ 3.6V
• Ambient temperature
Ta=-20 ~ 85°C
• Package : 48-pin TSOP (Type-I) , 0.4mm lead pitch
APPLICATION
Mobile communication products
M6MF16S2AVP is suitable for the application of the
mobile-communication-system to reduce both the mount
space and weight .
A20
A19
A18
A16
A15
A14
A13
S-WE#
S-CE2
A12
F-CE#
F-Vcc
S-Vcc
F-WP2#
F-RP#
A11
A10
A9
A8
A7
A6
A5
A4
NC
PIN CONFIGURATION (TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
F-Vcc
F-GND
S-Vcc
S-GND
A0-A17
A18-A20
DQ0-DQ7
F-CE#
F-OE#
F-WE#
F-WP1#,WP2#
F-RP#
F-RY/BY#
S-CE1#,CE2
S-OE#
S-WE#
48 F-WP1#
47 S-OE#
46 A17
45 F-WE#
44 F-OE#
43 S-CE1#
42 F-RY/BY#
41 DQ7
40 DQ6
39 DQ5
38 DQ4
37 F-Vcc
36 F-GND
35 F-GND
34 DQ3
33 S-GND
32 DQ2
31 DQ1
30 DQ0
29 A0
28 A1
27 A2
26 A3
25 NC
14.0 mm
:Vcc for Flash
:GND for Flash
:Vcc for SRAM
:GND for SRAM
:Flash/SRAM common Address
:Address for Flash
:Data I/O
:Flash Chip Enable
:Flash Output Enable
:Flash Write Enable
:Flash Write Protect
:Flash Reset Power Down
:Flash Ready /Busy
:SRAM Chip Enable
:SRAM Output Enable
:SRAM Write Enable
NC:Non Connection
1
May.1998 , Rev.1.2
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