ISL8510 查看數據表（PDF） - Renesas Electronics

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ISL8510

Dual Output Controller with 1A Standard Buck PWM and LDO

Renesas Electronics 

ISL8510

LDO Current Limit

The ISL8510 monitors and controls the pass transistor’s gate

voltage to limit output current. The current limit for LDO is

700mA typical. The output can be shorted to ground without

damaging the part due to the current limit and thermal

protection features.

Undervoltage Protection

If the voltage detected on the buck regulator FB pin falls 15%

below the internal reference voltage, the undervoltage fault

condition flag is set. The fault protection circuitry checks the

overcurrent flag. If the overcurrent flag is set, the fault monitor

latches off the internal power MOSFET. The regulator will not

restart until either a POR restart or the EN_PWM pin is cycled.

If the overcurrent flag is not set, an internal undervoltage

counter is set to 1. The fault controller continues to monitor the

FB pin for 4 clock cycles. If the fault condition persists, the

regulator is shutdown. The controller enters a recovery mode

similar to the overcurrent hiccup mode. No action is taken for 4

soft-start cycles and the internal undervoltage counter and fault

condition flag are reset. A normal soft-start cycle is attempted

and normal operation continues if the fault condition has

cleared. If the undervoltage counter overflows during soft-start,

the converter is shut down and this hiccup mode operation

repeats.

Undervoltage protection only applies to the buck regulator

output; the LDO output does not have undervoltage protection.

Thermal Overload Protection

Thermal overload protection limits total power dissipation in the

ISL8510. There are three sensors on the chip to monitor the

junction temperature of the internal LDO, PWM switching

power N-Channel MOSFET, and LDO pass transistors. When

the junction temperature (TJ) of any of the three sensors

exceeds +150°C, the thermal sensor sends a signal to the fault

monitor.

The fault monitor commands the buck regulator to shut down

and the LDO to turn off the pass transistor. The buck regulator

soft-starts and the LDO pass transistor turn on again after the

IC’s junction temperature cools by +20°C. The buck regulator

experiences hiccup mode operation and the LDO a pulsed

output during continuous thermal overload conditions. For

continuous operation, do not exceed the +125°C junction

temperature rating.

Low Dropout Regulator

The regulator consists of a 0.6V reference, error amplifier,

MOSFET driver, P-Channel pass transistor, and dual-mode

comparator. The voltage is set by means of an external resistor

divider on the FB_LDO pin. The 0.6V band gap reference is

connected to the error amplifier’s inverting input. The error

amplifier compares this reference to the selected feedback

voltage and amplifies the difference. The MOSFET driver

reads the error signal and applies the appropriate drive to the

FN6516 Rev 2.00

December 15, 2008

P-Channel pass transistor. If the feedback voltage is lower than

the reference voltage, the pass transistor gate is pulled lower,

allowing more current to pass and increasing the output

voltage. If the feedback voltage is higher than the reference

voltage, the pass transistor gate is driven higher, allowing less

current to pass to the output.

Internal P-Channel Pass Transistor

The LDO regulator in the ISL8510 feature a typical 0.33

rDS(ON) P-Channel MOSFET pass transistor. This provides

several advantages over similar designs using PNP bipolar

pass transistors. The P-Channel MOSFET requires no base

drive, which reduces quiescent current considerably. PNP

based regulators waste considerable current in dropout when

the pass transistor saturates. They also use high base drive

currents under large loads. The ISL8510 does not have these

drawbacks.

Integrator Circuitry

The ISL8510 uses external compensation capacitors for

minimizing load and line regulation errors and for lowering

output noise. When the output voltage shifts due to varying

load current or input voltage, the integrator capacitor voltage is

raised or lowered to compensate for the systematic offset at

the error amplifier. Compensation is limited to ±5% to minimize

transient overshoot when the device goes out of dropout,

current limit, or thermal shutdown. Place a 33nF capacitor to

GND from CC1 and CC2.

Application Guidelines

Operating Frequency

The ISL8510 operates at a fixed switching frequency of

500kHz.

LDO Regulator Capacitor Selection

Capacitors are required at the ISL8510 LDO Regulators’ input

and output for stable operation over the entire load range and

the full temperature range. Use a >1µF capacitor at the input of

LDO Regulator, VIN_LDO pin. The input capacitor lowers the

source impedance of the input supply. Larger capacitor values

and lower ESR provide better PSRR and line transient

response. The input capacitor must be located at a distance of

not more then 0.5 inches from the VIN_LDO pin of the IC and

returned to a clean analog ground. Any good quality ceramic

capacitor can be used as an input capacitor.

The output capacitors used in LDO regulator are used to

provide dynamic load current. The amount of capacitance and

type of capacitor should be chosen with this criteria in mind.

The output capacitor selected must meet the requirements of

minimum amount of capacitance and ESR for LDO. The

ISL8510 is specifically designed to work with small ceramic

output capacitors. The output capacitor’s ESR affects stability

and output noise. Use an output capacitor with an ESR of

50m or less to insure stability and optimum transient

response. For stable operation, a ceramic capacitor, with a

minimum value of 10µF, is recommended for LDO output.

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