DESCRIPTION
ST3413A  is  the  P-Channel  logic  enhancement  mode  power  field  effect  transistor  which  is
produced  using  high  cell  density,  DMOS  trench  technology.  This  high  density  process  is
especially  tailored  to  minimize  on-state  resistance.  These  devices  are  particularly  suited
for  low  voltage  application  such  as  cellular  phone  and  notebook  computer  power
management, other battery powered circuits, and low in-line power loss are required. The product is in a very small outline surface mount package.

FEATURE
-20V/-3.4A, RDS(ON) = 70mΩ (Typ.) @VGS= -4.5V
-20V/-2.4A, RDS(ON) = 80mΩ @VGS= -2.5V
-20V/-1.7A, RDS(ON) = 125mΩ @VGS= -1.8V
Super high density cell design for extremely low RDS(ON)
Exceptional on-resistance and maximum DC current capability
SOT-23 package design