74LVC3G34DC 查看數據表（PDF） - Philips Electronics

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74LVC3G34DC

Triple buffer gate

Philips Electronics 

Philips Semiconductors

74LVC3G34

Triple buffer gate

3. Quick reference data

Table 1: Quick reference data

GND = 0 V; Tamb = 25 °C.

Symbol Parameter

Conditions

tPHL, tPLH

propagation

delay input nA to

output nY

VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ

VCC = 2.5 V; CL = 30 pF; RL = 500 Ω

VCC = 2.7 V; CL = 50 pF; RL = 500 Ω

VCC = 3.3 V; CL = 50 pF; RL = 500 Ω

VCC = 5.0 V; CL = 50 pF; RL = 500 Ω

CI

input

capacitance

CPD

power

dissipation

VCC = 3.3 V

capacitance per

gate

[1] CPD is used to determine the dynamic power dissipation (PD in µW).

PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑(CL × VCC2 × fo) = sum of outputs.

[2] The condition is VI = GND to VCC.

Min Typ Max Unit

- 3.8 - ns

- 2.4 - ns

- 2.5 - ns

- 2.2 - ns

- 1.9 - ns

- 2.5 - pF

[1] [2] -

14 -

pF

4. Ordering information

Table 2: Ordering information

Type number

Package

Temperature range Name Description

Version

74LVC3G34DP

−40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

74LVC3G34DC

−40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1

body width 2.3 mm

74LVC3G34GT

−40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; SOT833-1

8 terminals; body 1 × 1.95 × 0.5 mm

5. Marking

Table 3: Marking codes

Type number

74LVC3G34DP

74LVC3G34DC

74LVC3G34GT

Marking code

V34

Y34

Y34

9397 750 14545

Product data sheet

Rev. 03 — 31 January 2005

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

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