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M37640E8FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

Ver 1.4

MITSUBISHI MICROCOMPUTERS

7640 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

1.19.7 UART Address Mode

The UART address mode is intended for use in a

multi-receiver environment where an address is sent

before each message to designate which UART or

UARTs are to wake-up and receive the message. An

address is identified by the MSB of the incoming data

byte being a “1”. The bit is “0” for non-address data.

UART address mode can be used in either 8-bit or 9-

bit character length mode. The character length is

chosen by writing the appropriate values to the UART

Character Length Selection Bits (LE1,0).

UART address mode is enabled by setting the UART

Address Mode Enable Bit (AME) to “1”. When UART

address mode is enabled, the MSB of a newly re-

ceived byte of data (that is either 8 or 9 bits in length)

is examined if a valid stop bit is detected and a parity

error has not occurred (if parity is enabled). If the MSB

is “1”, then the receive buffer full interrupt and flag are

set and AME is automatically cleared, disabling UART

address mode. If the MSB is “0”, then the receive

buffer full interrupt is not set. However, the RBF flag is

still set for this case. If a valid stop bit is not detected

or a parity error has occurred, neither the receive buffer

full flag nor interrupt is set and the MSB of the data is

not examined. Instead, either the framing error or par-

ity error flag is set, the error sum flag is set, and the

error sum interrupt is set.

While in UART address mode, the generation of over-

run errors is disabled after the first byte of data is

received. Therefore, when non-address data is re-

ceived without errors while in the UART address mode,

it is not necessary to read the UART receive buffer

prior to the reception of the next byte of data. Also, if

a framing or parity error occurs while in UART address

mode, it is not necessary to read the UxSTS prior to

the reception of the next byte of data. However, an

overrun error will occur if an address byte is received

and the UART receive buffer is not read before a new

byte of data is received. This is the case because the

UART address mode was automatically disabled when

the address byte was received. Also, an overrun error

will occur for the first byte received after UART address

mode is enabled if the preceding byte received did not

generate an error and the UART receive buffer was not

read, or the preceding byte did generate an error and

UxSTS was not read.

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