RTL8181 查看數據表（PDF） - Realtek Semiconductor

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RTL8181

Wireless LAN Access Point/Gateway Controller

Realtek Semiconductor 

0xBD40_0100

0xBD40_0106

0xBD40_0116

WLAN_KMAR

WLAN_KMKEY

WLAN_KMC

WLAN key map address register

WLAN key map key value

WLAN key map configuration

RTL8181

5. System Configuration

GPIO pin for system configuration

GPIOB pin

Power on Latch Value

9-6

1111

other values are reserved

11,10

13

01

11

other values are reserved

1

0

15-14

1,0

Reserved

Reserved

Operating setting

CPU=200,MEM=100 if

Memory use asynchronous

mode

JTAG mode

Normal mode (wlan LED)

Power on default

1,1,1,1

1,1

Memory clock use

1

asynchronous mode.

Synchronous mode,the MEM

clock same as CPU clock

Reserved

Reserved

1,1

System Control Register Set

Virtual address Size (byte) Name

Description

0xBD01_0100 4

BRIDGE_R WLAN, Eherernet0, Ethernet1 and PCI

EG

bridge configuration register

0xBD01_0104 4

PLLMN_R RTL8181 DPLL parameter

EG

0xBD01_0108 1

MEM_REG RTL8181 Memory clock rate

0xBD01_0109 1

CPU_REG RTL8181 CPU clock rate

Bridge Control Register (BRIDGE_REG)

Since the Lexra bus clock rate is fast than the network device, it needs a bus bridge between the CPU and device (i.e., Ethernet

and Wireless LAN controller). Also, this bridge is existed between CPU and PCIbridge.

Bit Bit Name Description

R/W

InitVal

2-0 NIC0CKR Bus clock to NIC0 clock ratio. 001= 1:2,

R/W

011

011=1:4,101=1:6,111=1:8 ,other value

reserved. The NIC0 and NIC1 maximum clock

is 50MHz.

3

NIC0CKREN NIC0CKR write enable

R/W

0

6-4 -

Reserved

-

-

7

DISNIC0B Disable NIC0,0 enable NIC0, 1 disable NIC0 R/W

0

10-8 NIC1CKR Bus clock to NIC1 clock ratio. 001= 1:2,

R/W

011

011=1:4,101=1:6,111=1:8 ,other value

reserved

11

NIC1CKREN NIC0CKR write enable

R/W

0

14-12 -

Reserved

R/W

0

15 DISNIC1B Disable NIC1,0 enable NIC1, 1 disable NIC1 R/W

0

18-16 PCICLKR Bus clock to PCI clock ratio. 000=1:1,001= R/W

101

1:2,010=1:3,011=1:4,100=1:5,101=1:6,110=1:

7,111=1:8. The PCI maximum clock is

50MHz.

19

PCICKREN PCICLKR write enable

R/W

0

20 LXPCI

The external Bus is PCI or Lexra(debug

R/W

1

mode).0 Lexra, 1 PCI.

21 PCI2ENB The second PCI bus enable. 0 enable second R/W

1

PCI device,1 disable second PCI device

22 Reserved

CONFIDENTIAL

16

v1.0

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