MC92500ZQ 查看數據表（PDF） - Motorola => Freescale

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MC92500ZQ

ATM Cell Processor

Motorola => Freescale 

TABLE OF CONTENTS

1. ATM NETWORK

1.1 ATM Network Description ................................... 3

1.2 ATM Network Applications ................................. 4

2. FUNCTIONAL DESCRIPTION

2.1 System Functional Description .......................... 5

2.2 MC92500 Functional Description ....................... 5

2.2.1 Ingress Cell Flow ......................................... 6

2.2.2 Egress Cell Flow .......................................... 6

2.3 Other Functions ................................................. 7

2.4 MC92500 Block Diagram ................................... 7

2.4.1 Ingress PHY Interface (IPHI) ....................... 8

2.4.2 Ingress Cell Processing Unit (IPU) .............. 8

2.4.3 Ingress Switch Interface (ISWI) ................... 8

2.4.4 Egress Switch Interface (ESWI) ................... 8

2.4.5 Egress Cell Processing (EPU) ..................... 8

2.4.6 Egress PHY Interface (EPHI) ....................... 9

2.4.7 External Memory Interface (EMIF) ............... 9

2.4.8 Microprocessor Interface (MPIF) ................. 9

2.4.9 Internal Scan (ISCAN) ................................. 9

2.4.10 Forward Monitoring Cell Generation(FMC) 9

3. REGISTERS DESCRIPTION

3.1 MC92500 Registers ........................................... 9

4. EXTERNAL MEMORY DESCRIPTION

4.1 MC92500 External Memory ............................. 11

4.1.1 Memory Partitioning ................................... 11

5. SIGNAL DESCRIPTION

5.1 Functional Signal Groups ................................. 13

5.2 Ingress PHY Signals ........................................ 13

5.3 Egress PHY Signals ......................................... 14

5.3.1 Ingress Switch Interface Signals ................ 14

5.3.2 Egress Switch Interface Signals ................ 15

5.4 External Memory Signals ................................. 15

5.4.1 Control Signals .......................................... 16

5.4.2 Microprocessor Signals (MP)..................... 16

5.4.3 Clock Signals ............................................. 17

5.4.4 JTAG Interface Test Signals ....................... 17

6. INGRESS DATA PATH OPERATION

6.1 Ingress Data Path ............................................ 17

6.2 Interface to Physical Layer - Cell Assembly ..... 18

6.3 Address Compression ...................................... 19

6.4 Cell Counting .................................................... 19

6.5 Ingress Cell Insertion ....................................... 20

6.6 Switch Overhead Information ........................... 20

6.7 Transfer to Switch ............................................. 20

7. EGRESS DATA PATH OPERATION

7.1 Egress Data Path ............................................. 20

7.1.1 Transfer from Switch ................................... 21

7.1.2 Multicast Identifier Translation .................... 22

7.1.3 Egress Cell Insertion .................................. 22

7.1.4 Address Translation .................................... 22

7.1.5 Cell Counting ............................................. 22

7.1.6 Transmission to Physical Layer .................. 22

8. SYSTEM OPERATION

8.1 MC92500 Modes of Operation ......................... 23

8.1.1 Setup Mode ................................................ 23

8.1.2 Operate Mode ............................................ 23

8.1.3 Reset .......................................................... 23

8.2 Data Path Clock Configuration ......................... 23

9. ELECTRICAL CHARACTERISTICS

9.1 Electrical Specifications ................................... 24

9.1.1 Clocks ........................................................ 24

9.1.2 Microprocessor Interface Timing ................ 25

9.1.3 PHY Interface Timing ................................. 32

9.1.4 Switch Interface Timing .............................. 33

9.1.5 External Memory Interface Timing ............. 34

9.1.6 Write Cycle Timing ..................................... 34

9.1.7 Read Cycle Timing ..................................... 35

9.1.8 DC Electrical Characteristics ..................... 36

10. PACKAGE INFORMATION

10.1 Pin Assignment .............................................. 38

10.2 256 PBGA Case Outline ................................. 39

MOTOROLA

2

MC92500

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