MX10E8050X 查看數據表（PDF） - Macronix International

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MX10E8050X

Microcontroller

Macronix International 

PRELIMINARY

MX10E8050I /

MX10E8050IA

AUXR (8EH)

EXTRAM

A0

- EXTRAM : External RAM Select Switch. Set 1 to select (MOVX) the external RAM directly.

Default is 0 to switch (MOVX) to external RAM only when the address is larger than 1k.

- AO : Turn off ALE output in internal execution mode.

( 1 : Turn off )

( 0 : Turn on )

Watchdog Timer/WDT/T3 (FFH)

- WDT consists of an 11-bit prescaler and an 8-bit timer formed by SFR T3.

EBTCON (EBH)

/EW

- /EW: After reset, /EW bit is set, and WDT is disable.

POWER CONTROL Register/PCON (87H)

SMOD1 SMOD0

X

WLE

GF1

GF0

PD

IDL

- SMOD1: Double baud rate bit for UART.

- SMOD0: Frame error detection bit.

- WLE: Watchdog load enable. This flag must be set prior to loading WDT and is cleared when WDT is loaded.

- GF1/GF0: general-purpose flag bit.

- PD: Power-down bit. Setting it activates power-down mode.

- IDL: Idle mode bit. Setting it activates idle mode.

- The CPU & Peripheral status during 2 power saving mode:

CPU

Int,Timer.

Oscillator ckt

Idle mode

OFF

ON

ON

Power-down mode

OFF

OFF

OFF

P/N:PM0887 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, MAR. 28, 2005

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