MX10E8050X 查看數據表（PDF） - Macronix International

零件编号

产品描述 (功能)

比赛名单

MX10E8050X

Microcontroller

Macronix International 

PRELIMINARY

MX10E8050I /

MX10E8050IA

(MSB)

TF2

EXF2

RCLK

TCLK EXEN2

TR2

C/T2

(LSB)

CP/RL2

Symbol

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

C/T2

CP/RL2

Position Name and Significance

T2CON.7

T2CON.6

T2CON.5

T2CON.4

T2CON.3

T2CON.2

T2CON.1

T2CON.0

Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by software. TF2 will not be set

when either RCLK or TCLK = 1.

Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and

EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will cause the CPU to vector to the Timer 2

interrupt routine. EXF2 must be cleared by software. EXF2 does not cause an interrupt in up/down

counter mode (DCEN = 1).

Receive clock flag. When set, causes the serial port to use Timer 2 overflow pulses for its receive clock

in modes 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive clock.

Transmit clock flag. When set, causes the serial port to use Timer 2 overflow pulses for its transmit clock

in modes 1 and 3. TCLK = 0 causes Timer 1 overflows to be used for the transmit clock.

Timer 2 external enable flag. When set, allows a capture or reload to occur as a result of a negative

transition on T2EX if Timer 2 is not being used to clock the serial port. EXEN2 = 0 causes Timer 2 to

ignore events at T2EX.

Start/stop control for Timer 2. A logic 1 starts the timer.

Timer or counter select. (Timer 2)

0 = Internal timer (OSC/6 in 6 clock mode or OSC/12 in 12 clock mode)

1 = External event counter (falling edge triggered).

Capture/Reload flag. When set, captures will occur on negative transitions at T2EX if EXEN2 = 1. When

cleared, auto-reloads will occur either with Timer 2 overflows or negative transitions at T2EX when

EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to auto-reload

on Timer 2 overflow.

Figure 2. Timer / Counter 2 (T2CON) Control Register

Table 9 : Timer 2 Operation Modes

RCLK + TCLK

CP / RL2

TR2

0

0

1

0

1

1

1

X

1

X

X

0

MODE

16-bit Auto-reload

16-bit Capture

Baud rate generator

( off )

P/N:PM0887 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, MAR. 28, 2005

18

Share Link: