MX10E8050X 查看數據表（PDF） - Macronix International

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MX10E8050X

Microcontroller

Macronix International 

PRELIMINARY

MX10E8050I /

MX10E8050IA

OSC

÷ n*

T2 Pin

C/T2 = 0

C/T2 = 1

Transition

Detector

Control

TR2 Capture

TL2

(8-bits)

TH2

(8-bits)

RCAP2L

RCAP2H

T2EX Pin

* n = 12 in 12 clock mode.

n = 6 in 6 clock mode.

Control

EXEN2

Figure 3 : Timer 2 in Capture Mode

TF2

EXF2

Timer 2

Interrupt

T2MOD Address = 0C9H

Reset Value = XXXX XX00B

Not Bit Addressable

T2OE DCEN

Bit

7

6

5

4

3

2

1

0

Symbol Function

-

T2OE

DCEN

Not implemented, reserved for future use.*

Timer 2 Output Enable bit.

Down Count Enable bit. When set, this allows Timer 2 to be configured as an up/down counter.

* User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features.

In that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is

indeterminate.

Figure 4 : Timer 2 Mode (T2MOD) Control Register

P/N:PM0887 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, MAR. 28, 2005

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