LF3370 查看數據表（PDF） - LOGIC Devices

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LF3370

High-Definition Video Format Converter

LOGIC Devices 

DEVICES INCORPORATED

LF3370

High-Definition Video Format Converter

FIGURE 17.CONFIGURATION, INPUT/OUTPUT BIAS ADDER, RSL, AND HBLANK LEVEL REGISTER LOADING SEQUENCE

CONFIG REG IN/OUT BIAS REG

RSL REGISTER

HBLANK LEVEL REGISTER

CLK

LD

CF12-0

W1

W2

W3

W4

ADDR1 DATA1 ADDR2 DATA1 ADDR3 DATA1 DATA2 DATA3 DATA4 ADDR4 DATA1 DATA2

W1: Configuration Register updated and effective on this rising clock edge.

W2: Input or Output Bias Adder Register updated and effective on this rising clock edge.

W3: RSL Register Set updated and effective on this rising clock edge.

W4: Horizontal Blanking Level Register updated and effective on this rising clock edge.

FIGURE 18.LOOK-UP TABLE LOADING SEQUENCE

CLK

W1

LD

CF11-0

ADDR1 N0

N1

N2

N3

N4

N1019 N1020 N1021 N1022 N1023

W1: LUT updated and effective on this rising clock edge.

FIGURE 19. MATRIX MULTIPLIER/KEY SCALER COEFFICIENT BANK LOADING SEQUENCE

CLK

W1

LD

CF12-0

ADDR1 COEF0 COEF1 COEF2 COEF3 COEF4 COEF5 COEF6 ADDR7 COEF8 COEF9

W1: Matrix Multiplier/Key Scaler Coefficient Set updated and effective on this active rising clock edge.

FIGURE 20. MATRIX MULTIPLIER/KEY SCALER COEFFICIENT BANK LOADING SEQUENCE WITH PAUSE IMPLEMENTATION

CLK

PAUSE

LD

CF12-0

ADDR1

COEF0

COEF1

W1

COEF9

W1: Matrix Multiplier/Key Scaler Coefficient Set updated and effective on this active rising clock edge.

Video Imaging Products

19

03/13/2001–LDS.3370-F

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