CP767 数据手册 ( 数据表 ) - Central Semiconductor
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CP767
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Central Semiconductor
PROCESS DETAILS
Process EPITAXIAL PLANAR
Die Size 30 x 30 MILS
Die Thickness 9.0 MILS
Base Bonding Pad Area 3.85 x 4.20 MILS
Emitter Bonding Pad Area 7.35 x 3.75 MILS
Top Side Metalization Al - 30,000Å
Back Side Metalization Au - 15,000Å
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Small Signal Transistor PNP - Saturated Switch Transistor Chip ( Rev : 2002 )
Central Semiconductor
Small Signal Transistor NPN - Saturated Switch Transistor Chip ( Rev : 2002 )
Central Semiconductor
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