Functional Description
The CY7C1328G SRAM integrates 256 K × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

FEATUREs
■ Registered inputs and outputs for pipelined operation
■ Optimal for performance (double-cycle deselect)
   ❐ Depth expansion without wait state
■ 256 K × 18 common I/O architecture
■ 3.3 V core power supply (VDD)
■ 3.3 V/2.5 V I/O power supply (VDDQ)
■ Fast clock-to-output times
   ❐ 4.0 ns (for 133-MHz device)
■ Provide high-performance 3-1-1-1 access rate
■ User-selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences
■ Separate processor and controller address strobes
■ Synchronous self-timed writes
■ Asynchronous output enable
■ Available in Pb-free 100-pin TQFP package
■ “ZZ” sleep mode option