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L3GD20 查看數據表(PDF) - STMicroelectronics

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L3GD20 Datasheet PDF : 44 Pages
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L3GD20
3
Application hints
Application hints
Figure 5. L3GD20 electrical 9cnoFnnections and external component values
+ ΩZ
X
+ ΩY
+ ΩX
(TOP VIEW)
DIRECTIONS OF THE
DETECTABLE
ANGULA RATES
Vdd GND GND
10 µF
100 nF
10nF(25V)*
C1
Vdd_IO
SCL/SPC
SDA_SDI_SDO
SDO/SA0
GND
16
1
14 13
12
TOP
VIEW
4
5
9
8
CS DR INT
Vdd I2C bus
* C1 must guarantee 1 nF value under
11 V bias condition
SCL/SPC
SDA_SDI_SDO
Rpu Rpu = 10kOhm
Pull-up to be added when I2C interface is used
AM10128V1
Power supply decoupling capacitors (100 nF + 10 µF) should be placed as near as possible
to the device (common design practice).
If Vdd and Vdd_IO are not connected together, 100 nF and 10 µF decoupling capacitors
must be placed between Vdd and common ground, and 100 nF between Vdd_IO and
common ground. Capacitors should be placed as near as possible to the device (common
design practice).
Doc ID 022116 Rev 1
15/44

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