M37640E8FP 查看數據表（PDF） - Mitsumi

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M37640E8FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

Ver 1.4

MITSUBISHI MICROCOMPUTERS

7640 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

1.14.1.6 Port P7

Port P7 is a 5-bit general purpose I/O port that can be

configured to access special second functions.

Port P70

This pin is multiplexed with the USB start of frame

pulse (SOF) output. When USBC6 is a “1”, this pin

outputs the USB SOF.

Port P71

This pin is multiplexed with the HOLD function. When

the MCU is in memory expansion or microprocessor

mode and CPMB5 is set to “1”.

Port P72

This pin is multiplexed with the S1 input control signal

from a Master CPU. When DBBC17 is “1”, the pin

takes on the function of the S1 input control signal.

Port P73

This pin is multiplexed with the IBF1 output control

signal for a Master CPU and the HLDA function.

When DBBC11 and DBBC17 are “1”, the pin takes on

the function of the IBF1 output control signal. When

the MCU is in memory expansion or microprocessor

mode, CPMB5 is set to “1”, and the IBF1 function is

not enabled.

Port P74

This pin is multiplexed with the OBF1 control pin for

the bus interface control block. P74 acts as OBF1 out-

put to a Master CPU when DBBC10 and DBBC17 are

“1”.

Port P70

Data Bus

USBC6

Direction Register

Port Latch

SOF

Port P71

CPMB5

Direction Register

Data Bus

Port Latch

HOLD

Port P72

DBBC17

Direction Register

Data Bus

Port Latch

S1

Fig. 1.19. Port P7 Block Diagram

22

CPMB5

DBBC17

Port P73

DBBC11

DBBC17

CPMB5

Data Bus

Direction Register

Port Latch

IBF1

HLDA

Port P74

DBBC10

DBBC17

Direction Register

Data Bus

Port Latch

OBF1

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