SAF-XC858CA-16FFI5V 查看數據表（PDF） - Infineon Technologies
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SAF-XC858CA-16FFI5V Datasheet PDF : 124 Pages
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XC858CA
Electrical Parameters
4.3.5 External Data Memory Characteristics
Table 42 shows the timing of the external data memory read cycle.
Table 42 External Data Memory Read Timing (Operating Conditions apply)
Parameter
Symbol
Limit Values
Min.
Max.
Unit Test
Conditions
RD pulse width
t1
CC 2*fCCLK - 17 -
ns
1)
Address valid to RD t2
CC fCCLK - 12
-
ns
1)
RD to valid data in
t3
SR -
1.5*fCCLK - 27 ns
1)
Address to valid data in t4
SR -
3*fCCLK - 7
ns
1)
Data hold after RD
t5
SR 0.5*fCCLK -17 -
ns
1)
1) Not all parameters are 100% tested, but are verified by design/characterization and test correlation.
Addresses
RD
D[7:0]
DATA ADDRESS
t1
t2
t3
t4
t5
VALID
Figure 39 External Data Memory Read Cycle
Data Sheet
108
V1.0, 2010-03
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